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In nominal situations, GNSS receivers continuously output a navigation solution using the measurements generated by the tracking loops. The receiver must therefore ensure that the tracking loops are following correctly the incoming signal and that they have not diverged away from the solution. This is the purpose of the lock detectors that produce quality factors to assess how good the signal is being tracked.
In nominal situations, GNSS receivers continuously output a navigation solution using the measurements generated by the tracking loops. The receiver must therefore ensure that the tracking loops are following correctly the incoming signal and that they have not diverged away from the solution. This is the purpose of the lock detectors that produce quality factors to assess how well the signal is being tracked.


==Concept==
==Concept==
The objective of the lock detectors is to assess whether the incoming signal is being correctly tracked at channel level or not. For that purpose, the GNSS receiver evaluates quality pre-defined quality parameters in order to assess:
The objective of the lock detectors is to assess whether the incoming signal is being correctly tracked at channel level or not. For that purpose, the GNSS receiver evaluates pre-defined quality parameters in order to assess:
*Code lock of the [[Delay Lock Loop (DLL)|DLL]]
*Code lock of the [[Delay Lock Loop (DLL)|DLL]]
*Phase lock of the [[Phase Lock Loop (PLL)|PLL]]
*Phase lock of the [[Phase Lock Loop (PLL)|PLL]]
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These quality parameters may be obtained from the correlators’ outputs or cross-checking of internal information, as detailed hereafter.
These quality parameters may be obtained from the correlators’ outputs or cross-checking of internal information, as detailed hereafter.


After computing these quality parameters, the receiver checks their values against pre-defined thresholds, which may depend on the application. As an example, if the receiver is targeting high accuracy, these thresholds might be tighter, whereas if the priority is on availability, then these thresholds are more likely relaxed.
After computing these quality parameters, the receiver checks their values against pre-defined thresholds, which may depend on the application. As an example, if the receiver is targeting high accuracy, these thresholds might be more restrictive, whereas if the priority is solution availability, then these thresholds are more likely to be relaxed.
Once loss of lock is declared, the receiver may react in different ways. If only one of the loops loses lock (e.g. the PLL), then the receiver may decide to keep the other loops closed and to restart only this loop. Conversely, the receiver may decide that this loss of lock is unrecoverable and switch back to acquisition, see also [[Receiver Operations|Receiver Operations]].
Once loss of lock is declared, the receiver may react in different ways. If only one of the loops loses lock (e.g. the PLL), then the receiver may decide to keep the other loops closed and to restart only this loop. Conversely, the receiver may decide that this loss of lock is unrecoverable and switch back to acquisition, see also [[Receiver Operations|Receiver Operations]].


These decisions are closely related to the receiver design and they are often the result of all the performance trade-offs related to the target application.
These decisions are closely related to the receiver design and they are often the result of all the performance trade-offs tailored to the target application.


==Code Lock Detectors==
==Code Lock Detectors==
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<math>WBP_k=[\sum_M (I_P^2 + Q_P^2)]_k</math>
<math>WBP_k=[\sum_M (I_P^2 + Q_P^2)]_k</math>


Where
where
*I_P and Q_P are the In-phase and Quadrature outputs of the prompt correlator respectively, see [[Correlators|Correlators]] for further information
*<math>I_P</math> and <math>Q_P</math> are the In-phase and Quadrature outputs of the prompt correlator respectively, see [[Correlators|Correlators]] for further information
*M is the number of coherent integrations for the lock detector
*M is the number of coherent integrations for the lock detector


The estimated mean of the narrow power is given by:
The estimated mean of the narrow power is given by:
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<math>\hat{\mu}_{NP}=\frac{1}{K}\sum_{k=1}^K \frac{NBP_k}{WBP_k}</math>
<math>\hat{\mu}_{NP}=\frac{1}{K}\sum_{k=1}^K \frac{NBP_k}{WBP_k}</math>


Where K is the number of non-coherent integrations for the lock detector
where K is the number of non-coherent integrations for the lock detector.
 


Finally, the estimated carrier to noise ratio computed at the correlators is given by:
Finally, the estimated carrier to noise ratio computed at the correlators is given by:
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<math>\frac{\hat{C}}{N_0}=10 log_{10} (\frac{1}{T} \frac{\hat{\mu}_{NP} - 1}{M - \hat{\mu}_{NP}})</math>
<math>\frac{\hat{C}}{N_0}=10 log_{10} (\frac{1}{T} \frac{\hat{\mu}_{NP} - 1}{M - \hat{\mu}_{NP}})</math>


Where T is the integration time.
where T is the integration time.
 


==Phase Lock Detectors==
==Phase Lock Detectors==
The phase lock detector is based on the concept that, if the incoming signal is being correctly tracked, then the in-phase component of the prompt correlator is maximum and its quadrature component is minimum.
 
The phase lock detector is based on the concept that, if the incoming signal is being correctly tracked, then the in-phase component of the prompt correlator is maximum and its quadrature component is minimum, as shown [[Phase Lock Loop (PLL)|here]].


A quality parameter often used at the receiver is the cosine of twice the phase of the prompt correlator, given by<ref name="dierendonck"></ref>:
A quality parameter often used at the receiver is the cosine of twice the phase of the prompt correlator, given by<ref name="dierendonck"></ref>:
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<math>cos(2\phi)=\frac{[\sum_M I_P]_k^2 - [\sum_M Q_P]_k^2}{[\sum_M I_P]_k^2 + [\sum_M Q_P]_k^2}</math>
<math>cos(2\phi)=\frac{[\sum_M I_P]_k^2 - [\sum_M Q_P]_k^2}{[\sum_M I_P]_k^2 + [\sum_M Q_P]_k^2}</math>


Please note that, when in good lock conditions, this quality parameter will be nearly 1.
Please note that, when in good lock conditions, this quality parameter is nearly 1.
 


==Frequency Lock Detectors==
==Frequency Lock Detectors==
Frequency lock detectors are not so common in receiver implementations, since the receiver mainly relies on phase lock detectors and code lock detectors<ref name="dierendonck"></ref>.
Frequency lock detectors are not so common in receiver implementations, since the receiver mainly relies on phase lock detectors and code lock detectors<ref name="dierendonck"></ref>.
In any case, one possible implementation might be to cross check that the carrier Doppler (velocity state) is consistent with the code Doppler (velocity state) measured at the DLL.
In any case, one possible implementation of a frequency lock detector is to cross check that the carrier Doppler (velocity state) is consistent with the code Doppler (velocity state) measured at the DLL.
 


==Related articles==
==Related articles==
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*[[Multicorrelator]]
*[[Multicorrelator]]
*[[Tracking Loops]]
*[[Tracking Loops]]
*[[Baseband Processing]]
*[[Phase Lock Loop (PLL)]]
*[[Frequency Lock Loop (FLL)]]
*[[Delay Lock Loop (DLL)]]
 


==References==
==References==

Revision as of 07:43, 6 May 2011


ReceiversReceivers
Title Lock Detectors
Author(s) GMV
Level Advanced
Year of Publication 2011
Logo GMV.png

In nominal situations, GNSS receivers continuously output a navigation solution using the measurements generated by the tracking loops. The receiver must therefore ensure that the tracking loops are following correctly the incoming signal and that they have not diverged away from the solution. This is the purpose of the lock detectors that produce quality factors to assess how well the signal is being tracked.

Concept

The objective of the lock detectors is to assess whether the incoming signal is being correctly tracked at channel level or not. For that purpose, the GNSS receiver evaluates pre-defined quality parameters in order to assess:

  • Code lock of the DLL
  • Phase lock of the PLL
  • Frequency lock of the FLL

These quality parameters may be obtained from the correlators’ outputs or cross-checking of internal information, as detailed hereafter.

After computing these quality parameters, the receiver checks their values against pre-defined thresholds, which may depend on the application. As an example, if the receiver is targeting high accuracy, these thresholds might be more restrictive, whereas if the priority is solution availability, then these thresholds are more likely to be relaxed. Once loss of lock is declared, the receiver may react in different ways. If only one of the loops loses lock (e.g. the PLL), then the receiver may decide to keep the other loops closed and to restart only this loop. Conversely, the receiver may decide that this loss of lock is unrecoverable and switch back to acquisition, see also Receiver Operations.

These decisions are closely related to the receiver design and they are often the result of all the performance trade-offs tailored to the target application.

Code Lock Detectors

The concept behind the code lock detector is that, if the DLL is working correctly, then the received signal power is high. Since the received signal is noisy, code lock is often assessed by comparing the estimated Carrier to Noise ratio, [math]\displaystyle{ \hat{C}/N_0 }[/math], with a pre-defined threshold.

At the receiver, the [math]\displaystyle{ \hat{C}/N_0 }[/math] can be computed using the ratio between signal plus noise power measured with different bandwidths[1].

As such, the narrowband power computed over M and k integration periods can be written as:

[math]\displaystyle{ NBP_k=[\sum_M I_P]_k^2 + [\sum_M Q_P]_k^2 }[/math]

and the wide band power computed over M and k integration periods can be written as:

[math]\displaystyle{ WBP_k=[\sum_M (I_P^2 + Q_P^2)]_k }[/math]

where

  • [math]\displaystyle{ I_P }[/math] and [math]\displaystyle{ Q_P }[/math] are the In-phase and Quadrature outputs of the prompt correlator respectively, see Correlators for further information
  • M is the number of coherent integrations for the lock detector


The estimated mean of the narrow power is given by:

[math]\displaystyle{ \hat{\mu}_{NP}=\frac{1}{K}\sum_{k=1}^K \frac{NBP_k}{WBP_k} }[/math]

where K is the number of non-coherent integrations for the lock detector.


Finally, the estimated carrier to noise ratio computed at the correlators is given by:

[math]\displaystyle{ \frac{\hat{C}}{N_0}=10 log_{10} (\frac{1}{T} \frac{\hat{\mu}_{NP} - 1}{M - \hat{\mu}_{NP}}) }[/math]

where T is the integration time.


Phase Lock Detectors

The phase lock detector is based on the concept that, if the incoming signal is being correctly tracked, then the in-phase component of the prompt correlator is maximum and its quadrature component is minimum, as shown here.

A quality parameter often used at the receiver is the cosine of twice the phase of the prompt correlator, given by[1]:

[math]\displaystyle{ cos(2\phi)=\frac{[\sum_M I_P]_k^2 - [\sum_M Q_P]_k^2}{[\sum_M I_P]_k^2 + [\sum_M Q_P]_k^2} }[/math]

Please note that, when in good lock conditions, this quality parameter is nearly 1.


Frequency Lock Detectors

Frequency lock detectors are not so common in receiver implementations, since the receiver mainly relies on phase lock detectors and code lock detectors[1]. In any case, one possible implementation of a frequency lock detector is to cross check that the carrier Doppler (velocity state) is consistent with the code Doppler (velocity state) measured at the DLL.


Related articles


References

  1. ^ a b c A. J. Van Dierendonck, “GPS Receivers”, from “Global Positioning System: Theory and Applications”, Volume I, Edited by B. W. Parkinson, J. J. Spilker Jr